? semiconductor components industries, llc, 2006 september, 2006 ? rev. 6 1 publication order number: ntd78n03/d ntd78n03 power mosfet 25 v, 78 a, single n?channel, dpak features ? low r ds(on) ? optimized gate charge ? pb?free packages are available applications ? desktop vcore ? dc?dc converters ? low side switch maximum ratings (t j = 25 c unless otherwise noted) parameter symbol value unit drain?to?source voltage v dss 25 v gate?to?source voltage v gs 20 v continuous drain current (note 1) stead y state t c = 25 c i d 14.8 a t c = 85 c 11.5 power dissipation (note 1) t c = 25 c p d 2.3 w continuous drain current (note 2) t c = 25 c i d 11.4 a t c = 85 c 8.8 power dissipation (note 2) t c = 25 c p d 1.4 w continuous drain current (r jc ) t c = 25 c i d 78 a t c = 85 c 56 power dissipation (r jc ) t c = 25 c p d 64 w pulsed drain current t p = 10 s i dm 210 a current limited by package t a = 25 c i dmaxpkg 45 a drain to source dv/dt dv/dt 8.0 v/ns operating junction and storage temperature t j , t stg ?55 to 175 c source current (body diode) i s 78 a single pulse drain?to?source avalanche energy (v dd = 24 v, v gs = 10 v, l = 5.0 mh, i l (pk) = 17 a, r g = 25 ) e as 722.5 mj lead temperature for soldering purposes (1/8 from case for 10 seconds) t l 260 c thermal resistance junction?to?case (drain) r jc 1.95 c/w junction?to?ambient ? steady state (note 1) r ja 65 junction?to?ambient ? steady state (note 2) r ja 110 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface?mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [1 oz] including traces). 2. surface?mounted on fr4 board using the minimum recommended pad size. case 369aa dpak (bend lead) style 2 marking diagrams & pin assignments case 369d dpak (straight lead) style 2 25 v 4.6 @ 10 v r ds(on) typ 78 a i d max v (br)dss 6.5 @ 4.5 v http://onsemi.com 1 2 3 4 see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information 1 2 3 4 case 369ad ipak (straight lead ) 1 2 3 4 n?channel d s g yww 78 n03g 1 gate 2 drain 3 source 4 drain 4 drain 2 drain 1 gate 3 sourc e 4 drain 2 drain 1 gate 3 source yww 78 n03g yww 78 n03g y = year ww = work week 78n03 = device code g = pb?free package
ntd78n03 http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 25 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j 24 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 20 v t j = 25 c 1.5 a t j = 125 c 10 gate?to?source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 3) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.0 1.6 3.0 v negative threshold temperature coefficient v gs(th) /t j ?5.0 mv/ c drain?to?source on resistance r ds(on) v gs = 10 v, i d = 78 a 4.6 6.0 m v gs = 4.5 v, i d = 36 a 6.5 7.8 forward transconductance gfs v ds = 10 v, i d = 15 a 22 s charges, capacitances and gate resistance input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 12 v 1920 2250 pf output capacitance c oss 960 reverse transfer capacitance c rss 420 total gate charge q g(tot) v gs = 4.5 v, v ds = 20 v, i d = 20 a 25.5 35 nc threshold gate charge q g(th) 2.4 gate?to?source charge q gs 5.3 gate?to?drain charge q gd 18.2 switching characteristics (note 4) turn?on delay time t d(on) v gs = 4.5 v, v ds = 20 v, i d = 20 a, r g = 3.0 11 ns rise time t r 68 turn?off delay time t d(off) 23 fall time t f 42 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 20 a t j = 25 c 0.83 1.0 v t j = 125 c 0.7 reverse recovery time t rr v gs = 0 v, dis/d t = 100 a/ s, i s = 20 a 39 ns charge time ta 17.8 discharge time tb 21 reverse recovery time q rr 33 nc package parasitic values source inductance l s ta = 25c 2.49 nh drain inductance l d 0.02 gate inductance l g 3.46 gate resistance r g 1.0 3. pulse test: pulse width 300 s, duty cycle 2%. 4. switching characteristics are independent of operating junction temperatures.
ntd78n03 http://onsemi.com 3 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 3 2 1.5 0.5 0 1000 10000 100000 0.005 0 30 8 6 4 i d , drain current (amps) 0 v gs , gate?to?source voltage (v) figure 1. on?region characteristics figure 2. transfer characteristics i d , drain current (amps) 10 0.01 0.005 0.002 0.001 40 0 20 60 70 80 figure 3. on?resistance versus drain current and temperature i d , drain current (a) figure 4. on?resistance versus drain current and gate voltage i d , drain current (a) r ds(on) , drain?to?source resistance ( ) figure 5. on?resistance variation with temperature t j , junction temperature ( c) figure 6. drain?to?source leakage current versus voltage v ds , drain?to?source voltage (v) i dss , leakage (na) 50 ?50 100 75 0 ?25 125 175 03 6 55 0 0.01 0.015 520 15 10 25 v ds , drain?to?source voltage (v) 10 20 40 10 v gs = 0 v t j = 125 c t j = 150 c v gs = 4.5 v v gs = 10 v t j = 25 c v gs = 10 v v ds 10 v t j = 25 c t j = ?55 c t j = 125 c r ds(on) , drain?to?source resistance ( ) r ds(on) , drain?to?source resistance (normalized) t j = 25 c 50 25 45 2 v gs = 4 v 2.6 v 3.2 v 3.4 v 3.6 v 3.8 v 3 v 4.5 v 5 v 0.004 0.003 0.006 60 65 70 75 80 60 90 80 100 70 9 v 0 2.5 1 i d = 78 a v ds = 4.5 v 100 10 2 1 50 30 t j = 25 c 0.007 0.008 0.009 t j = ?55 c t j = 125 c 150
ntd78n03 http://onsemi.com 4 10 20 30 40 50 60 70 80 0.5 0.6 0.7 0.8 0.9 1.1 1.2 10 5 0 5 10 15 20 25 v gs v ds 4 8 6 0 2000 c, capacitance (pf) 0 q g , total gate charge (nc) figure 7. capacitance variation figure 8. gate?to?source and drain?to?source voltage versus total charge v gs , gate?to?source voltage (v) figure 9. resistive switching time variation versus gate resistance v sd , source?to?drain voltage (v) i s , source current (amps) 6000 gate?to?source or drain?to?source voltage (v) 1000 4000 2 i d = 20 a t j = 25 c q 1 v gs = 0 v t j = 25 c v gs = 0 v t j = 25 c c rss c iss c oss 3000 0 5 10 15 20 25 30 35 q 2 q t figure 10. diode forward voltage versus current r g , gate resistance (ohms) 1 10 100 1000 1 t, time (ns) 100 t r t d(off) t d(on) t f 10 v ds = 20 v i d = 20 a v gs = 4.5 v figure 11. maximum rated forward biased safe operating area 0.1 1 100 v ds , drain?to?source voltage (volts) 0.1 1000 i d , drain current (amps) r ds(on) limit thermal limit package limit 10 10 v gs = 20 v single pulse t c = 25 c 1 ms 100 s 10 ms dc 10 s 100 200 300 400 500 600 700 800 25 50 75 100 125 150 175 t j , starting junction temperature ( c) eas, single pulse drain?to? source avalanche energy (mj) figure 12. maximum avalanche energy versus starting junction temperature i d = 78 a 5000 c rss c iss v ds = 0 v v gs v ds v ds , drain?to?source voltage (v) 0 5 10 15 20 0 1.0 1 100 0
ntd78n03 http://onsemi.com 5 di/dt t rr t a t p i s 0.25 i s time i s t b figure 13. diode reverse recovery waveform r ja (t) = r(t) r ja d curves apply for power pulse train shown read time at t 1 t j(pk) ? t a = p (pk) r ja (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 figure 14. thermal response ? various duty cycles t, time (seconds) rthja(t), effective transient thermal resistance 1000 1 d = 0.5 1e?05 1e?03 1e?02 1e?01 0.2 0.01 0.01 0.02 0.05 0.1 1e+00 1e+01 1e+03 single pulse 1e?04 1e+02 mounted to minimum recommended footprint duty cycle 100 10 0.1 ordering information order number package shipping ? ntd78n03 dpak 75 units/rail ntd78n03g dpak (pb?free) 75 units/rail ntd78n03t4 dpak 2500 tape & reel ntd78n03t4g dpak (pb?free) ntd78n03?1 dpak straight lead 75 units/rail ntd78n03?1g dpak straight lead (pb?free) ntd78n03?35 dpak?3 straight lead (3.5 0.15 mm) 75 units/rail ntd78n03?35g dpak?3 straight lead (3.5 0.15 mm) (pb?free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntd78n03 http://onsemi.com 6 package dimensions dpak (single guage) case 369aa?01 issue a d a b r v s f l 2 pl m 0.13 (0.005) t e c u j ?t? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.025 0.035 0.63 0.89 e 0.018 0.024 0.46 0.61 f 0.030 0.045 0.77 1.14 j 0.018 0.023 0.46 0.58 l 0.090 bsc 2.29 bsc r 0.180 0.215 4.57 5.45 s 0.024 0.040 0.60 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 123 4 h 0.386 0.410 9.80 10.40 h 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 mm inches scale 3:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* style 2: pin 1. gate 2. drain 3. source 4. drain
ntd78n03 http://onsemi.com 7 package dimensions dpak case 369d?01 issue b style 2: pin 1. gate 2. drain 3. source 4. drain 123 4 v s a k ?t? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? 3.5 mm ipak, straight lead case 369ad?01 issue o b d l e e3 l2 b1 e 3x a1 a a1 a2 dim min max millimeters a 2.19 2.38 a1 0.46 0.60 a2 0.87 1.10 b 0.69 0.89 b1 0.77 1.10 d 5.97 6.22 e 2.28 bsc d2 4.80 ??? e 6.35 6.73 e2 4.70 ??? e3 4.45 5.46 l 3.40 3.60 l1 ??? 2.10 notes: 1.. dimensioning and tolerancing per asme y14.5m, 1994. 2.. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from terminal tip. 4. dimensions d and e do not include mold gate or mold flash. t seating d2 e2 optional construction plane l1 l2 0.89 1.27 2x m 0.13 t d2 e2 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. ntd78n03/d publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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